Variable Threshold Receiver Circuit
Original Publication Date: 1981-Apr-01
Included in the Prior Art Database: 2005-Feb-11
The off-chip receiver circuits (Figs. 1 and 2) are capable of receivin input signal amplitudes of 900 MV (minimum) while maintaining high DC noise immunity. For the input amplitudes shown, a minimum DC noise tolerance of 450 MV is achievable. Nominal delays in the range of 3.5 ns are obtainable to provide good AC noise immunity.