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Variable Threshold Receiver Circuit

IP.com Disclosure Number: IPCOM000051970D
Original Publication Date: 1981-Apr-01
Included in the Prior Art Database: 2005-Feb-11

Publishing Venue

IBM

Related People

Authors:
Johnson, RE Parker, CP Reedy, DC [+details]

Abstract

The off-chip receiver circuits (Figs. 1 and 2) are capable of receivin input signal amplitudes of 900 MV (minimum) while maintaining high DC noise immunity. For the input amplitudes shown, a minimum DC noise tolerance of 450 MV is achievable. Nominal delays in the range of 3.5 ns are obtainable to provide good AC noise immunity.