Apparatus Supporting Half Duplexed Encoding/Decoding Action
Original Publication Date: 1981-Apr-01
Included in the Prior Art Database: 2005-Feb-11
This invention relates to common apparatus supporting the half-duplexed arithmetic string encoding and decoding action. Such an apparatus is premised on the observation that adding a trial augend to a dedicated arithmetic unit input register during an add and shift encoding cycle utilizes the same data path as adding the complement (subtraction) of a trial augend to the same register during the subtract shift decoding cycle.