No Device RAM Cell
Original Publication Date: 1981-May-01
Included in the Prior Art Database: 2005-Feb-11
A random-access memory (RAM) cell is provided with a gated P-N junction that can be made to break down at a very low voltage when a reverse bias is applied to the gate. The breakdown is enhanced by utilizing a thin gate oxide layer and a shallow junction. A forward bias is used for reading, and a reverse bias is used for writing.