Browse Prior Art Database

Input Buffer Circuit

IP.com Disclosure Number: IPCOM000052127D
Original Publication Date: 1981-May-01
Included in the Prior Art Database: 2005-Feb-11

Publishing Venue

IBM

Related People

Authors:
Bula, J Gray, KS [+details]

Abstract

This input buffer circuit provides field effect transistor logic levels in response to bipolar transistor-transistor-logic (TTL) levels and provides reliable transitions between output levels for both the least positive up level (LPUL) and the most positive down level (MPDL) input signals by the use of a voltage shift circuit for LPULs and a level-sensing trigger circuit for MPDLs.