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Design of a High Power Dissipation Module Disclosure Number: IPCOM000052163D
Original Publication Date: 1981-May-01
Included in the Prior Art Database: 2005-Feb-11

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Doo, VY [+details]


The module combines the back face chip mounting and the solder reflow input/output (I/O) joints at minimum stress in the solder joints. The figure shows the vertical section of the module. The silicon chip 2 is rigidly mounted by joint 1 onto a module case 3 which has cooling fins 4 for efficient power dissipation. The chip I/O pins 5 are connected to a fanout plate 6 by solder joints 7. A cover plate 8, which has brazed I/O pins 5 and flexible contact wires 9 attaching to the pins 5, is soldered to the module case 3 to seal, at 10, the chip and fanout plate 6 in the module case 3.