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A double-gated FET is used to monitor oxide charge in the sidewall silicon dioxide of a double polysilicon process.
English (United States)
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Sidewall Silicon Dioxide Charge Level Detector
A double-gated FET is used to monitor oxide charge in the sidewall silicon
dioxide of a double polysilicon process.
Fig. 1 shows a charge-coupled device (CCD) cross section including a P type
silicon substrate 10, silicon dioxide layer 11, and first polysilicon layer 12 which is
insulated from second polysilicon layer 13 by silicon dioxide layer 14. A high
charge level in the sidewall oxide at A in Fig. 1 can cause incomplete charge
transfer in CCD structures.
Fig. 2 shows the double-gated insulated gate FET in top view. The sidewall
silicon dioxide area A and Nsource/drain regions are indicated in Fig. 2. If the
sidewall silicon dioxide charge is high, the double-gated structure will have a
lower voltage V(t) than the single-gated structure. Therefore, this double-gated
FET is a good monitor for sidewall silicon dioxide charge.
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