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Mask Alignment Independent Base Resistance Minimization in NPN Transistors without Degradation of the Emitter Base Junction Characteristics

IP.com Disclosure Number: IPCOM000052186D
Original Publication Date: 1981-May-01
Included in the Prior Art Database: 2005-Feb-11

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Jambotkar, CG [+details]


Two alternative methods are described for fabricating integrated circui consisting of NPN transistors, Schottky barrier diodes and P type resistor. The two methods enable minimization of extrinsic base resistance of the NPN transistors in a manner independent of the mask alignment tolerance. What is important unlike other schemes aimed at the same objective, is that the emitter-base (and base-collector) junction characteristics of the NPN transistors are not degraded in any manner. Reduction in the base resistance results in improved circuit performance. First Method 1. Start with a P- substrate, a part, of which is shown by 2 in Fig. 1, and grow on it approximately 3500 Angstrom thick thermal SiO(2). It should be noted that Fig.