Array Stabilization for Random Access Memory
Original Publication Date: 1981-May-01
Included in the Prior Art Database: 2005-Feb-11
The drawing shows a two-dimensional array of memory cells on a single chip all tied to ground through R(1). Where the voltage across R(1) differs from a reference voltage V(Ref), oscillations are gated to an AC-to-DC converter, the output of which directly varies the chip substrate voltage of the memory.