Dismiss
The InnovationQ application will be updated on Sunday, May 31st from 10am-noon ET. You may experience brief service interruptions during that time.
Browse Prior Art Database

Dedicated Addresses Control Interrupt Functions for Multiple I/O Devices

IP.com Disclosure Number: IPCOM000052251D
Original Publication Date: 1981-May-01
Included in the Prior Art Database: 2005-Feb-11

Publishing Venue

IBM

Related People

Authors:
Nicholson, JO [+details]

Abstract

Separate logic mean in each of number different I/O interfaces respond to the same bus addresses for interrupt handling. These addresses are decoded in addition to the unique I/O device addresses for each interface. Cycle-steal (direct memory access) may be performed in this way also.