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Attached Processor Interface Echo Checking

IP.com Disclosure Number: IPCOM000052329D
Original Publication Date: 1981-Jun-01
Included in the Prior Art Database: 2005-Feb-11

Publishing Venue

IBM

Related People

Authors:
Sitler, WR [+details]

Abstract

In an attached processor system it is advantageous to determine that al of the control signals sent from one subsystem to the other subsystem did, in fact, arrive correctly. Generally, this interface goes across chips, modules, boards, etc., which implies cables and I/O connections. These are the least reliable components in the system and have the highest failure rates. The arrangement described herein shows how the interface lines required to control each subsystem are verified, that what was sent was indeed received. This arrangement is not limited to subsystem control but can be applied at any facility level, i.e., chip to chip, module to module, card to card, etc.