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FET Structure Disclosure Number: IPCOM000052341D
Original Publication Date: 1981-Jun-01
Included in the Prior Art Database: 2005-Feb-11

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Jambotkar, CG [+details]


A method is disclosed for fabricating an FET structure which provides improved performance characteristics. The FET source and drain of such structure have thick SiO(2) islands beneath them formed in a manner self-aligned to the SiO(2)/Si(3)N(4) sidewall of the N/+/ polysilicon gate.