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Browse Prior Art Database

PLA Simulator

IP.com Disclosure Number: IPCOM000052377D
Original Publication Date: 1981-Jun-01
Included in the Prior Art Database: 2005-Feb-11

Publishing Venue

IBM

Related People

Authors:
Price, CA [+details]

Abstract

A logic and storage circuit simulates a programmable logic array (PLA) A register holds binary values of input logic variables. A "don't care" store holds an entry for each product term or sum term, and these entries are combined with the input variables in a logic function to mask the variables that do not enter into the corresponding product or sum term. A "personalization" store holds an entry for each term, and the bits of each entry specify the matching value of each unmasked input variable and have a matching 0 bit for each masked bit of the input variables. Each output of the personality store is compared with the masked input variables to produce a match or mismatch signal for each input variable. These signals are ANDed to produce a single bit product term.