Margin of Reliability Test Employing Operating Terminals
Original Publication Date: 1981-Jun-01
Included in the Prior Art Database: 2005-Feb-11
Memory circuits employing race comparison or "differential droop" sense are tested by a circuit driven from ;the operating inputs, the normal functions being disabled by a signal beyond the normal range. The test circuit brings the sensing clock pulse closer and closer to the originating clock pulse by an analog signal which varies an RC timing circuit.