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The proposed emitter coupled logic NOR gate, wherein no external refere voltage is needed, readily lends itself to dotting.
English (United States)
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Emitter Coupled Logic Gate with a Dual Current Source
The proposed emitter coupled logic NOR gate, wherein no external refere
voltage is needed, readily lends itself to dotting.
The input data are provided on the bases E1 to E3 of transistors T1 to T3,
respectively, having their emitters coupled together. The reference source is
defined with two values according to the input level states, and an image circuit is
used to provide output OUT with dotting.
When all inputs are at 0`level, transistors T1 to T3 are off, transistors TA and
TB conduct the same current. By choosing the value of resistor R2 to have diode
SC cut off, the output level on OUT remains equal to V.
When one input, E1, for example, is at 1`level, the voltage on the common
emitter causes diode SA to be switched off, so that transistor TB fully turns on.
The collector current of transistor TB is defined by resistors R1, R2 and R3. Due
to the conduction of transistor T1, transistor TA conducts the same current. The
output level is low since diode SC is ON.
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