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This arrangement of latches in an array permits the latches of the arra to be used in a shift register mode of operation during test with a minimum of added structure.
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Trigger Arrays Using Shift Register Latches
This arrangement of latches in an array permits the latches of the arra to be
used in a shift register mode of operation during test with a minimum of added
During system operation, the latches L(1) and L(2)(Fig. 2) in the array (Fig. 1) accessed independently of one another through the bit and word lines of the
array. However, during testing, the L(1) and L(2) latches function as part of a
Shift Register Latch (SRL). These shift register latches are connected together to
form one or more independent shift registers.
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