High Speed Multilayer Ceramic Chip Carrier
Original Publication Date: 1981-Jun-01
Included in the Prior Art Database: 2005-Feb-11
In Fig. 1, a VLSI (very large-scale integrated) chip carrier with an integrated decoupling capacitor structure has its capacitor plates 10 oriented in the "vertical y" direction in slots within the chip carrier. The substrate contains a large amount of decoupling capacitance which can regulate the power supply system in the presence of simultaneous switching activities on a semiconductor chip.