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Browse Prior Art Database

High Speed Multilayer Ceramic Chip Carrier

IP.com Disclosure Number: IPCOM000052645D
Original Publication Date: 1981-Jun-01
Included in the Prior Art Database: 2005-Feb-11

Publishing Venue

IBM

Related People

Authors:
Ho, CW [+details]

Abstract

In Fig. 1, a VLSI (very large-scale integrated) chip carrier with an integrated decoupling capacitor structure has its capacitor plates 10 oriented in the "vertical y" direction in slots within the chip carrier. The substrate contains a large amount of decoupling capacitance which can regulate the power supply system in the presence of simultaneous switching activities on a semiconductor chip.