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Testing of Josephson Interferometer Circuits

IP.com Disclosure Number: IPCOM000052655D
Original Publication Date: 1981-Jun-01
Included in the Prior Art Database: 2005-Feb-11

Publishing Venue

IBM

Related People

Authors:
Herrell, DJ [+details]

Abstract

When testing Josephson circuit chips containing interferometers, it is possible that the "one" input test level may place the operating point of the interferometer being tested under a lobe. Because this will not ensure that the interferometer being tested will switch, an AC signal is superimposed on a slowly varying "one" level of the primary input to the chip under test. This moves the operating point out from under a lobe in order to ensure switching. A heat switch is used to ensure that the superimposed AC signal will not appear on the "zero" test level.