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A technique is described which allows for the expansion of data address space in a microprocessor beyond its natural addressing capabilities.
English (United States)
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Increased Address Space for a Fixed Address Space Microprocessor
A technique is described which allows for the expansion of data address
space in a microprocessor beyond its natural addressing capabilities.
In accordance with the scheme, an additional address line is generated for
use in increasing the microprocessor address space. The additional address line
is generated only when a specific instruction is executed identifying therewith a
specific register. The register is used as a memory reference pointer, and as
such identifies the additional address space.
In practice, the address line is activated under two specific conditions: (1)
when a predetermined first instruction with a specific register is executed to write
data to the additional address space, and (2) when a second predetermined
instruction with a specific register is executed to read data from the additional
The use of such a technique is advantageous as there is minimal impact to
the system and instruction set. Only two instructions are affected and these only
when used with the specific register. The larger the number of general-purpose
registers, therefore, the less will be the impact. Additionally, the data is
addressed in the normal fashion using existing microprocessor instructions.