Browse Prior Art Database

Four Phase Overlap Clock Ring Counter

IP.com Disclosure Number: IPCOM000052706D
Original Publication Date: 1981-Jul-01
Included in the Prior Art Database: 2005-Feb-11

Publishing Venue

IBM

Related People

Authors:
Glaise, R [+details]

Abstract

Shown in Fig. 1A is a four-phase overlap clock ring counter. This counter, which is self-cleaning, comprises a shift register and NAND gates for feeding back its input.