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Four Phase Overlap Clock Ring Counter Disclosure Number: IPCOM000052706D
Original Publication Date: 1981-Jul-01
Included in the Prior Art Database: 2005-Feb-11

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Glaise, R [+details]


Shown in Fig. 1A is a four-phase overlap clock ring counter. This counter, which is self-cleaning, comprises a shift register and NAND gates for feeding back its input.