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Three Dimensional Programmable Logic Array

IP.com Disclosure Number: IPCOM000052709D
Original Publication Date: 1981-Jul-01
Included in the Prior Art Database: 2005-Feb-11

Publishing Venue

IBM

Related People

Authors:
Goetze, V Hehl, W Miersch, E Schuett [+details]

Abstract

The three-dimensional programmable logic array (3D PLA) of Fig. 1 consists of an AND field and an OR field which are connected to each other via control lines C and C as well as column lines. The column lines, coming from the 3D cells of the AND field, serve as input lines for the OR field. The row lines IN1, IN2, IN3 ... in the AND field serve as input lines, while the row line OUT1 in the OR field is used as an output line for the 3D PLA.