Browse Prior Art Database

Programmed Logic Array

IP.com Disclosure Number: IPCOM000052844D
Original Publication Date: 1981-Jul-01
Included in the Prior Art Database: 2005-Feb-11

Publishing Venue

IBM

Related People

Authors:
Kraft, WR Moore, VS Stahl, WL Wylie, TJ [+details]

Abstract

An arrangement is described which increases the performance of PLAs (programned logic arrays) in data processing systems by putting a state register 3 between the AND array 1 and 0R array 2 of the PLA.