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Hardware Synchronization of a Low Performance Local Storage Device with a High Performance Microprocessor

IP.com Disclosure Number: IPCOM000052853D
Original Publication Date: 1981-Jul-01
Included in the Prior Art Database: 2005-Feb-11

Publishing Venue


Related People

Cannon, JW Phillips, LA [+details]


A local storage array with a Read/Write cycle time is incorporated into a microprocessor having a shorter cycle time. A hardware interface is provided for synchronizing the storage array with a processor.