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Contact First FET Technology Disclosure Number: IPCOM000052901D
Original Publication Date: 1981-Jul-01
Included in the Prior Art Database: 2005-Feb-12

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Garbarino, PL Riseman, J [+details]


A method of doping and passivating the contact polycrystalline silicon or Poly I layer 10 involves implanting As or P at the doping level of about 3 x 10/16/cm/2/ and at low energies into the upper reaches of the contact polysilicon layer 10. A chemical vapor deposited (CVD) silicon dioxide layer 11 is then deposited on Poly I layer 10 of such thickness that the final thickness of that layer after gate silicon dioxide growth is 3000-4000 angstroms. This is done to minimize overlap capacitances between the poly layers after polycrystalline silicon or Poly II layer 12 is formed on the silicon dioxide layer 11, as shown in Fig. 1.