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Conversion of PLA-Logic Implementations

IP.com Disclosure Number: IPCOM000052972D
Original Publication Date: 1981-Aug-01
Included in the Prior Art Database: 2005-Feb-12

Publishing Venue

IBM

Related People

Authors:
Gilkinson, JL Lewis, SD [+details]

Abstract

A logic design in the form of a programmable logic array (PLA) is converted to equivalent random logic in a given target technology by representing the PLA as a set of technology-independent logic blocks, performing logic reductions, adding any required drivers and receivers, repowering outputs as required, and converting the technology-independent blocks to logic functions in the target technology.