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High Performance Two Cycle Loop Decimal Multiply Algorithm Disclosure Number: IPCOM000053142D
Original Publication Date: 1981-Sep-01
Included in the Prior Art Database: 2005-Feb-12

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Angiulli, JM Chang, DC Hornick, JC Nohilly, WJ Zajac, MW [+details]


In certain high performance processors the decimal multiply execution is operand length and data dependent, and in most operations is a time-consuming execution. In certain commercial job environments, the decimal multiply takes up a disproportionate amount of CPU Busy Time because of the large number of cycles required to manipulate the data before the final product is determined.