Browse Prior Art Database

Single Cycle Branch Operations for a High Speed Microprocessor

IP.com Disclosure Number: IPCOM000053191D
Original Publication Date: 1981-Sep-01
Included in the Prior Art Database: 2005-Feb-12

Publishing Venue

IBM

Related People

Authors:
Chevillat, PR Kaeser, HP Maiwald, D Ungerboeck, G [+details]

Abstract

In a signal processor architecture having two separate, parallel instruction streams, one for performing arithmetic and logic operations involving the ALU, and the other for load/store operations, this parallel processing capability is utilized to improve the performance for branch operations significantly.