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Assembly and Retention of Component Parts in Josephson Technology Package Disclosure Number: IPCOM000053207D
Original Publication Date: 1981-Sep-01
Included in the Prior Art Database: 2005-Feb-12

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Anacker, W Tsui, F [+details]


In packaging circuits using Josephson tunneling devices, a three-dimness arrangement has been described in U.S. Patent 3,949,274. Logic and memory circuits are realized on superconducting chips, which are mounted on circuit modules with pedestals provided with pins. The modules are inserted into a receptor board with microsockets, each microsocket being filled with a mercury drop. On the other side of the receptor board, wiring modules are inserted to implement the connection among the circuit modules. Additionally, power modules are inserted for power supply distribution. The wiring modules can be provided with pins on the side pointing away from the receptor board into which they are inserted, so that another board (called the sandwiched board) can be attached onto the wiring modules.