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Brazing Preform for Semiconductor Package

IP.com Disclosure Number: IPCOM000053280D
Original Publication Date: 1981-Sep-01
Included in the Prior Art Database: 2005-Feb-12

Publishing Venue

IBM

Related People

Authors:
Ainslie, N Eramo, JJ Palmateer, PH Slayton, G Taylor, BR [+details]

Abstract

This preform is particularly adapted to join a cover or frame to a ceramic substrate used in semiconductor packages wherein the substrate will be subjected to numerous re-work heating cycles. The preform 10 is a one-piece rectangular frame formed of three layers, namely a center gold layer 12 and outside gold/tin alloy layers 14. In joining, the preform 10 is placed between the ceramic substrate and the element to be joined, and the assembly heated to a temperature sufficient to melt the gold/tin layers 14. During the heating step, the center gold layer 12 alloys with the gold/tin layers 14, forming layers having a higher gold content. This increase in gold content raises the melting point of the alloy, thereby increasing its reliability during future re-work cycles where the assembly may be subjected to additional heating.