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Redundancy Scheme Disclosure Number: IPCOM000053392D
Original Publication Date: 1980-Jan-01
Included in the Prior Art Database: 2005-Feb-12

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Tomczak, JJ Wiedman, FW [+details]


The yield advantages obtained by the use of redundant lines in memory matrices is well known. Yield increases are substantial and sometimes even dramatic using this technique, particularly as the sizes of the matrices increase. This article describes a redundancy scheme for a semiconductor memory array.