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Zigzag Word Lines ROS Array

IP.com Disclosure Number: IPCOM000053393D
Original Publication Date: 1980-Jan-01
Included in the Prior Art Database: 2005-Feb-12

Publishing Venue

IBM

Related People

Authors:
Chakravarti, SN Selleck, JE [+details]

Abstract

A read-only storage memory array having first and second sets of parallel word lines L1, L3 and L5 and L2, L4 and L6, respectively, wherein the first set is arranged orthogonal to the second set, has a simpler and denser chip architecture when formed as zigzag word lines L1, L2, L3, L4, L5 and L6, as shown in the figure, to eliminate the need for providing word decode drivers on two sides of the array to decode both the first and second sets of orthogonally arranged word lines.