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Structure For Lowering Power Dissipation In Dielectrically Isolated Integrated Circuits

IP.com Disclosure Number: IPCOM000053428D
Original Publication Date: 1980-Jan-01
Included in the Prior Art Database: 2005-Feb-12

Publishing Venue

IBM

Related People

Authors:
Das, G Gaind, A Sugarman, A [+details]

Abstract

In the bipolar integrated circuit, lateral dielectric isolation is replacing the conventional junction isolation for a great many applications. One of the attendant problems with the use of recessed oxide or other lateral dielectric isolation in bipolar devices is high power dissipation as well as noise coupling between neighboring devices. To a large extent this is due to high substrate resistivity. The present structure permits the use of lateral dielectric isolation without the above mentioned attendant disadvantages. This is accomplished by introducing a conductive plane in the substrate.