Directory Checking Mechanism
Original Publication Date: 1980-Jan-01
Included in the Prior Art Database: 2005-Feb-12
Fig. 1 shows a typical associative memory search mechanism. It contains a write address register 1 and a source register 2 for writing an entry into an array 3. It also has a compare register 4 for use in a search operation. On the search operation, the contents of the compare register 4 are compared (simultaneously) with each entry in the array 3. For 2/N/ entries, there are obviously 2/N/ comparators. The outputs of the comparators (here called HIT signals) are typically put through an output encoder to form an N-bit HIT ADDRESS.