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This article describes a method for managing the addressing of memory volumes in a system employing a mix of different boundary memory devices such as 1-byte and 2-byte (8-bit, 16-bit) wide devices.
English (United States)
This text was extracted from a PDF file.
This is the abbreviated version, containing approximately
85% of the total text.
Page 1 of 1
Multi Width Data Bus Manager
This article describes a method for managing the addressing of memory
volumes in a system employing a mix of different boundary memory devices such
as 1-byte and 2-byte (8-bit, 16-bit) wide devices.
A typical system in which such a scheme could be utilized would be one
which has a processor and main memory, each of which has data busses which
are 8 bits wide, and certain other devices such as an I/O device adapter having a
memory or buffer which is 2 bytes (16 bits) wide. The desire is to provide an
addressing scheme whereby any 2-byte location in the I/O adapter can be
addressed as a unit of storage, while the same addressing scheme
accommodates either of two memory devices on 1-byte boundaries.
The solution is to ignore the low-order bits of the address when the 16-bit
device is pointed to and to use the low-order bit of the address to direct the
remaining address bits to one or the other of two 8-bit devices when one of those
devices is to be accessed. For this purpose, a command line, the Memory Class
Select line, is used to indicate whether the address is to be treated as one
directed to a 16-bit device or to an 8-bit device. That command line can be
connected to enable the 16-bit device when in one of its states and to enable the
8-bit devices when in the other of its states. Since the low-order bit line is not
connected to the 16-bit device, it is of no significance to that device, but when the
8-bit devices are enabled, it is...