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Programmable, Expandable Interrupt Controller Disclosure Number: IPCOM000053556D
Original Publication Date: 1981-Oct-01
Included in the Prior Art Database: 2005-Feb-12

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Related People

Higdon, JM Wright, FD [+details]


A host processor is interrupted by signals from a universal interface, to which gating is added to activate the universal interface in response to an interrupt-acknowledge signal from the host processor. This provides more than eight interrupt signals. The number of interrupt signals to which the system responds is further expanded by employing an I/O expander in communication with the universal interface.