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A content-addressable memory cell, illustrated in the figure, is provided which does not require additional components or lines.
English (United States)
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Content Addressable Storage Cell
A content-addressable memory cell, illustrated in the figure, is provided
which does not require additional components or lines.
To determine the cell contents, the cell operates as follows:
Initially, in a typical cell, transistor T3 may be assumed to be on and
transistor T2 off, and lines DI and DI biased equally so that transistors T1 and T4
The voltage on line DI is then made equal to the potential of the word bottom
line WB, turning on T4.
The current produced by turning on T4 passes through the sensing resistor R
through T5 to increase the voltage drop across resistor R which is sensed at the
output terminal, indicating a match of the condition of line DI and the cell
For a mismatch condition, DI is made equal to the potential of word bottom
line WB. However, since T2 is off, similarly T1 will remain off so that no current
change takes place in sensing resistor R and, thus, there is no voltage change at
the output terminal.
Reading and writing of the cell are performed in the normal manner by
appropriately pulsing word top line WT, word bottom line WB and lines DI and DI.
In terms of a match or mismatch, the polarities of DI and DI may be reversed
so that a mismatch in the cell produces a voltage change at the output terminal.
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