Browse Prior Art Database

Integrated Saturation Control for Discrete Power Transistors

IP.com Disclosure Number: IPCOM000053692D
Original Publication Date: 1981-Oct-01
Included in the Prior Art Database: 2005-Feb-12

Publishing Venue

IBM

Related People

Authors:
Hegedus, SS [+details]

Abstract

A logic family, described by J. Lohstroh in an article entitled "ISL, Fast and Dense Low-Power Logic," IEEE Journal of S.S.C. SC-14, 585-590 (June 1979), makes use of the lateral and vertical "parasitic" PNP between the isolation and the NPN as a fundamental mechanism to obtain fast switching speeds.