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Measurement of High Speed Logic Recirculating Loop Frequency

IP.com Disclosure Number: IPCOM000053707D
Original Publication Date: 1981-Oct-01
Included in the Prior Art Database: 2005-Feb-12

Publishing Venue

IBM

Related People

Authors:
Malaviya, SD [+details]

Abstract

The recirculating loop is the most common medium for the measurement of logic speed in high speed technologies. The desired frequency for measurement is about 50 MHz; the maximum allowed at present is about 100 MHz. However, the recirculating loop for certain integrated circuits runs faster than 350 MHz. Reduction of the frequency to 100 MHz is practically impossible because of the large number of stages needed. This problem can be resolved by using the heterodyning phenomenon to produce low frequency output, f(1), from the recirculating loop by injecting an externally generated (local) frequency, f(2), into the loop and mixing it with the loop output.