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Bug List Optimizer for Logic Failure Simulation

IP.com Disclosure Number: IPCOM000053735D
Original Publication Date: 1981-Nov-01
Included in the Prior Art Database: 2005-Feb-12

Publishing Venue

IBM

Related People

Authors:
Cheng, DD [+details]

Abstract

A bug list is an input to logic failure simulation. This article is about a method which reduces the size of the bug list prior to its input to the failure simulator.