Multi Task using Coequal Multiple Microprocessors Having Memory Lock Facilities
Original Publication Date: 1981-Nov-01
Included in the Prior Art Database: 2005-Feb-12
A multiple-microprocessor system has an indivisible instruction for reading and setting lock bytes in a common memory. The lock bytes control entry to memory areas holding different tasks. The multiple processors can assign the tasks among themselves without a master processor and without any overall operating system, scheduler or other control program.