Two Dimensional Shifting Array
Original Publication Date: 1981-Nov-01
Included in the Prior Art Database: 2005-Feb-12
This invention relates to a VLSI-implementable mxn two dimensional shifting array for bit plane processing in which each array cell includes at least two bits of memory, processing, and connection logic to contiguous cells. A pxq subarray "window" can be defined on the array. Original or modified bits within a source subarray can be copied into the window and translated (moved) in the bit plane to any target subarray. At the target subarray, the "moved bits" may replace or be logically combined with the local data. Further, the size of any selectable subarray is not fixed by the geometry of the device. Any rectangular subarray from one bit in size up to the entire bit plane may be selected. Further, several operations, in addition to READ and WRITE, may be used for operating on the selected subarray.