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Current Controlled Gate Push Pull Dotting

IP.com Disclosure Number: IPCOM000053888D
Original Publication Date: 1981-Nov-01
Included in the Prior Art Database: 2005-Feb-12

Publishing Venue

IBM

Related People

Authors:
Dansky, AH Norsworthy, JP Waggoner, CD [+details]

Abstract

The capability of a logic circuit to drive heavy loads, e.g., high fan-out and output capacitance, is highly desirable, and consequently, the push-pull drive design has been used frequently to efficiently provide this capability. Another highly desirable feature for a logic circuit to possess is the 'dot function', that is, the merging of two levels of logic into one level of logic circuitry by simply connecting the outputs of two or more circuits together. However, the dotting of push-pull outputs has traditionally proven to be difficult since an active pullup may be working against an active pulldown in an up-level (emitter dot), resulting in unaffordably high power dissipation and current levels. In the circuit of this article, the current-controlled gate (CCG) circuit of Fig.