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Initialization of a Read/Write Memory Address Register with a PLA

IP.com Disclosure Number: IPCOM000053946D
Original Publication Date: 1980-Dec-01
Included in the Prior Art Database: 2005-Feb-12

Publishing Venue

IBM

Related People

Authors:
Kraft, WR Moore, VS Rhodes, JC Stahl, WL Thoma, NG [+details]

Abstract

In the past, to initialize a random-access memory address register, the instruction is gated from the processor bus to the instruction register (IR). The OP code is then decoded while the instruction is located in the IR. This requires several cycles of computer time to complete. After the OP code has been decoded, the random-access memory address register is initialized with either the contents of the R field, the contents of the RB field or the address of the instruction address register (IAR), and the memory read is initiated. When the memory read is complete, the instruction execution is started.