High Performance PNP and NPN Bipolar Chip
Original Publication Date: 1980-Dec-01
Included in the Prior Art Database: 2005-Feb-12
High speed logic circuits presently employ only NPN transistors in the base configuration. This limitation has the following disadvantages: 1. In a NPN circuit, the line capacitance is discharged through a resistor. A PNP integrated with an NPN would provide emitter follower pulldown with current amplification. 2. High standby current is continuously taken. A PNP would provide push-pull operation which takes no standby current. Thus, for a high-speed logic circuit, it is very desirable to have an integrated PNP and NPN structure formed within the same chip. This article describes a process for making such high performance PNP and NPN transistors.