Browse Prior Art Database

Bipolar Compatible N-Channel JFET With Transistor Transistor Logic Gate

IP.com Disclosure Number: IPCOM000054171D
Original Publication Date: 1980-Jan-01
Included in the Prior Art Database: 2005-Feb-13

Publishing Venue

IBM

Related People

Authors:
Bergeron, DL Patel, PT [+details]

Abstract

Shown in the figure is a unique ion implanted resistor. This resistor is formed by diffusing a pair of p+ regions 10 and 11 similar to the source and drain of a FET and connecting them with a buried p type region 14 which underlies a silicon dioxide screen 13 and an n type channel 12. Shown in the figure is an ion-implanted resistor formed by diffusing a pair of p+ regions 10 and 11 and interconnecting them with a buried ion implanted p region 14.