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IP.com Disclosure Number: IPCOM000054217D
Original Publication Date: 1980-Jan-01
Included in the Prior Art Database: 2005-Feb-13

Publishing Venue

IBM

Related People

Authors:
Buscaglia, CU [+details]

Abstract

In the 1 ma current switch emitter follower circuit shown in Fig. 1, most of the circuit delay is the lag between the current through R4 (controlling voltage at node 1) and the current through transistor T3. The large amount of capacitance on this node causes most of the circuit delay. Nominally, in the case where transistor T1 turns on and T3 turns off, current through T3 falls to zero approximately 0.6 ns before current through R4 falls to zero. In comparison, total circuit delay in this case is 0.815 ns. In the case where T3 turns on and T1 turns off, there is the same lag between current through T3 reaching 1 ma and current through R4 reaching 1 ma.