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Technique for Fabricating Bipolar Devices

IP.com Disclosure Number: IPCOM000054220D
Original Publication Date: 1980-Jan-01
Included in the Prior Art Database: 2005-Feb-13

Publishing Venue

IBM

Related People

Authors:
Banker, D Battista, M Park, SJ [+details]

Abstract

A double polysilicon (DPS) process used primarily to fabricate FET devices is utilized also to fabricate bipolar transistors and diodes. The technique allows circuit designers the option of selecting components which will enhance circuit design and chip layout. This technique consists of adding another masking step to etch away the polysilicon layer after the source and drain N+ ion implant operation is completed. This allows a lightly doped N- region (normally the depletion region) as well as the source and drain N+ regions to be available for bipolar device fabrication. As an example, Fig. 1 shows the horizontal masking steps to fabricate a Schottky barrier diode (SBD), and Fig. 2 shows the vertical cross-section of the same diode.