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Modified Complementary Dynamic Memory Cell

IP.com Disclosure Number: IPCOM000054322D
Original Publication Date: 1980-Jan-01
Included in the Prior Art Database: 2005-Feb-13

Publishing Venue

IBM

Related People

Authors:
Chao, HH Fang, FF Yu, HN [+details]

Abstract

This article describes an improvement of a nondestructive read-out dynamic memory cell of the type wherein an avalanche breakdown or punch through is used to write the memory cell to "on" state. Because the avalanche breakdown or punch through are difficult to control and may introduce reliability problems, it is desirable to write the memory cell with other methods. Therefore, a write gate (wordline for write operation) and a p+ bit line have been added to the memory cell. Thus, holes can be written in or out of the storage region in the same manner as the write operation of a one-device FET dynamic memory cell.