Browse Prior Art Database

Storage Control For Bad Data From A Central Processor

IP.com Disclosure Number: IPCOM000054454D
Original Publication Date: 1980-Feb-01
Included in the Prior Art Database: 2005-Feb-13

Publishing Venue

IBM

Related People

Authors:
McGilvray, BL Rodell, JT Sutton, AJ Vowell, JD [+details]

Abstract

A central processor (CP) is designed to transfer a unit of data (e.g., doubleword, line or block) to an addressed location in a selected basic storage module (BSM) component of main storage. When the transferred unit of data has an uncorrectable error, a need may exist to cause the erroneous data unit and its error correcting code (ECC) to be stored in the addressed location in a manner that provides a "bad data representation", such that a fetch request for that data unit and its ECC will cause the fetch request to recognize an uncorrectable error indication. The stored "bad data representation" has the format HC, in which H is the absolute address in the BSM where the "bad data representation" is stored in the BSM.