Storage Protection Mechanism for Processor
Original Publication Date: 1980-Mar-01
Included in the Prior Art Database: 2005-Feb-13
This article describes a mechanism for checking for possible software errors that could disrupt the integrity of the main storage in a processor, thus providing some degree of storage protection. The Storage Protection Device utilizes circuitry shown in Fig. 1 and is adaptable to a system without affecting the hardware or data flow of a processor having a Storage Relocation Translator such as that described in U.S. Patents 4,037,215 and 4,050,094. It serves to control processor channel functions without being part of the channel.