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The present method provides ceramic test chips to be used for testing of metallized circuitry on substrates and is an alternative which presents some advantages over the use of silicon wafers.
English (United States)
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Ceramic Shorted and Open Chips for Reliability Tests of MC and MCP
The present method provides ceramic test chips to be used for testing of
metallized circuitry on substrates and is an alternative which presents some
advantages over the use of silicon wafers.
As shown in the flow diagrams, ceramic substrates of a desired thickness
and pre-scored to a desired dimension are used. Metallurgy like Cr-Cu-Cr is
deposited on these "snap-strates" with existing conventional processes like
evaporation or sputtering. The first Cr layer is used for adhesion to the ceramic,
the Cu layer is used for conductivity, and the top Cr layer is used as a solder
dam. Using the select artwork used to build the substrate, through a standard
MC (metallized ceramic) photo-etch process, chrome is removed from the areas
where Pb/Sn metallurgy is desired. The "snap-strates" are then tinned (10/90)
and snapped into individual pieces to provide completed shorted ceramic chips.
To provide open chips, the same metallization and photo-etch processes are
used, hut a different photo-mask is used.
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